Figure 1.3 shows all the operations in each of the pipeline stages in the ALU pipeline, the load/store pipeline, and the HUM buffers.

Figure 1.4 shows a typical ALU data processing instruction. The processor does not use the load/store pipeline or the HUM buffer are not used.

Figure 1.5 shows a typical multiply operation. The MUL instruction can loop in the MAC1 stage until it has passed through the first part of the multiplier array enough times. Then it progresses to MAC2 and MAC3 where it passes once through the second half of the array to produce the final result.