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The unaligned access handling is summarized in Table 4.1.
Table 4.1. Unaligned access handling
| CP15 register c1 | Unaligned access model | |
|---|---|---|
| U bit | A bit | |
| 0 | 0 | Word-invariant ARMv5. See Word-invariant data access in ARMv6 (U=0)Word-invariant data access in ARMv6 (U=0)Word-invariant data access in ARMv6 (U=0). |
| 0 | 1 | Word-invariant natural alignment check. |
| 1 | 0 | ARMv6 unaligned half/word access, else strict word alignment check. |
| 1 | 1 | ARMv6 strict half/word alignment check. |
For a fuller description of the options available, see c1, Control Register.
| Copyright © 2002-2006 ARM Limited. All rights reserved. | ARM DDI 0211I |
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