ARM1136JF-S™ and ARM1136J-S™ Technical Reference Manual 3.3.12. c3, Domain Access Control Register

The purpose of the Domain Access Control Register is to hold the access permissions for a maximum of 16 domains, D15 to D0.

The Domain Access Control Register is:

Figure 3.32 shows the two-bit domain access permission fields of the register.

Figure 3.32. Domain Access Control Register format

Table 3.59 shows how the bit values correspond with the Domain Access Control Register functions.

Table 3.58. Domain Access Control Register field descriptions

Bit range	Field name	Function
^[1]	D<n>^[2]	The purpose of the fields D15-D0 is to define the access permissions for each of the 16 domains. These domains can be either sections, large pages or small pages of memory. Table 3.59 shows the encoding used for the domain access control fields.
^[1]There are 16 two-bit D fields. See Figure 3.32 for the bit range for each field. ^[2]n is the Domain number in the range 0 to 15.

Table 3.59 shows the encoding used for the bit fields in the Domain Access Control Register.

Table 3.59. Encoding of domain access control fields in the Domain Access Control Register

Value	Access type	Description
b00	No access	Any access generates a domain fault.
b01	Client	Accesses are checked against the access permission bits in the TLB entry.
b10	Reserved	Any access generates a domain fault.
b11	Manager	Accesses are not checked against the access permission bits in the TLB entry, so a permission fault cannot be generated.

Table 3.60 shows the results of attempted accesses to the Domain Access Control Register for each mode.

Table 3.60. Results of accesses to the Domain Access Control Register

Privileged read	Privileged write	User read or write
Data read	Data write	Undefined exception

You can access the Domain Access Control Register by reading or writing CP15 with:

For example:

MRC p15, 0, <Rd>, c3, c0, 0            ; Read Domain Access Control Register

MCR p15, 0, <Rd>, c3, c0, 0            ; Write Domain Access Control Register

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