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The AHB interface ports operate using standard AHB-Lite signals, extended for ARMv6.
This extension includes the following signals:
Signals an exclusive access failure.
Used to signal the memory types.
Signals that the access is an exclusive access.
Indicates that the access is unaligned and requires HBSTRB information.
Byte lane strobes.
Shared bit for current access.
Inner memory system attributes. Can be used to replace HPROT[4:2] if the level two system requires inner cache attributes. The encoding of HSIDEBAND[3:1] is the same as HPROT[4:2], but refers to inner cache attributes as opposed to outer cache attributes.
Table A.4 shows the one or two-letter suffix used on port signal names.
Table A.4. Port signal name suffixes
| Port | Suffix | Comment |
|---|---|---|
| Instruction fetch | I | Read only |
| Data read | R | Read only |
| Data write | W | Write only |
| Data read or data write | RW | Read or write |
| DMA | D | Bidirectional |
| Peripheral | P | Bidirectional |
| Copyright © 2002-2007, 2009 ARM Limited. All rights reserved. | ARM DDI 0211K |
| Non-Confidential | |
| PDF version | |
| Home > Signal Descriptions > AHB interface signals |