ARM1136JF-S and ARM1136J-S Technical Reference ManualRevision: r1p5
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6.12.3. Second-level page table walk

If bits [1:0] of the first-level descriptor bits are b01, then a page table walk is required. The MMU requests the second-level page table descriptor from external memory. Figure 6.14 shows the generation of a second-level page table address.

Figure 6.14. Generating a second-level page table address


When the page table address is generated, a request is made to external memory for the second-level descriptor.

By examining bits [1:0] of the second-level descriptor, the access type is indicated as shown in Table 6.17.

Table 6.17. Access types from second-level descriptor bit values

Descriptor format

Bit values

Access type

Both

b00

Translation fault

Backwards-compatibleb01

64KB large page

ARMv6

b01

64KB large page

Backwards- compatibleb104KB small page
ARMv6

b1XN

4KB extended small page

Backwards- compatibleb114KB extended small page

Second-level translation and access fault

If bits [1:0] of the second-level descriptor are b00, then a translation fault is generated. This generates an abort to the ARM1136JF-S processor, either a Prefetch Abort for the instruction side or a Data Abort for the data side.

If the second level description describes a large page, a small page, or an extended small page, an Access Flag fault is generated when all of the following conditions are met:

  • the XP bit is set in the CP15 Control register

  • the AFE bit is set in the CP15 Control register

  • AP[0]=0.

See Access Flag fault for more information, and see c1, Control Register for details of setting the XP and AFE bits.

Note

The Access Flag, and Access Flag faults, are only implemented from the rev1 (r1p0) release of the ARM1136JF-S processor.

Second-level large page base address

If bits [1:0] of the second-level descriptor are b01, then a large page table walk is required. Figure 6.15 shows the translation process for a 64KB large page using ARMv6 format (AP bits disabled).

Figure 6.15. Large page table walk, ARMv6 format


Figure 6.16 shows the translation process for a 64KB large page, or a 16KB large page subpage, using backwards-compatible format (AP bits enabled).

Figure 6.16. Large page table walk, backwards-compatible format


Using backwards-compatible format descriptors, the 64KB large page is generated by setting all of the AP bit pairs to the same values, AP3=AP2=AP1=AP0. If any one of the pairs are different, then the 64KB large page is converted into four 16KB large page subpages. The subpage access permission bits are chosen using the Virtual Address bits [15:14].

Second-level small page table walk

If bits [1:0] of the second-level descriptor are b10 for backwards-compatible format, then a small page table walk is required.

Figure 6.17 shows the translation process for a 4KB small page or a 1KB small page subpage using backwards-compatible format descriptors (AP bits enabled).

Figure 6.17. 4KB small page or 1KB small subpage translations, backwards-compatible


Using backwards-compatible descriptors, the 4KB small page is generated by setting all of the AP bit pairs to the same values, AP3=AP2=AP1=AP0. If any one of the pairs are different, then the 4KB small page is converted into four 1KB small page subpages. The subpage access permission bits are chosen using the Virtual Address bits [11:10].

Second-level extended small page table walk

If bits [1:0] of the second-level descriptor are b1XN for ARMv6 format descriptors, or b11 for backwards-compatible descriptors, then an extended small page table walk is required. Figure 6.18 shows the translation process for a 4KB extended small page using ARMv6 format descriptors (AP bits disabled).

Figure 6.18. 4KB extended small page translations, ARMv6 format


Figure 6.19 shows the translation process for a 4KB extended small page or a 1KB extended small page subpage using backwards-compatible format descriptors (AP bits enabled).

Figure 6.19. 4KB extended small page or 1KB extended small subpage translations, backwards-compatible


Using backwards-compatible descriptors, the 4KB extended small page is generated by setting all of the AP bit pairs to the same values, AP3=AP2=AP1=AP0. If any one of the pairs are different, then the 4KB extended small page is converted into four 1KB extended small page subpages. The subpage access permission bits are chosen using the Virtual Address bits [11:10].

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