3.5.2. ABORT

ABORT indicates that a memory transaction failed to complete successfully. ABORT is sampled at the end of the bus cycle during active memory cycles (S cycles and N cycles).

If ABORT is asserted on a data access, it causes the ARM7EJ-S processor to take the Data Abort trap. If it is asserted on an opcode fetch, the abort is tracked down the pipeline, and the Prefetch Abort trap is taken if the instruction is executed.

ABORT can be used by a memory management system to implement, for example, a basic memory protection scheme or a demand-paged virtual memory system.

For more details about aborts, see Aborts.

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