A.7. ETM interface signals

ETM interface signals are shown in Table A.7. For other ETM signals and how to connect a core, see the ETM9 (Rev 2a) Technical Reference Manual.

Table A.7. ETM interface signals

NameDirectionDescription

ETMBIGEND

OutputBig-endian configuration indication for the ETM.
ETMCHSD[1:0]OutputCoprocessor handshake decode indication for the ETM.
ETMCHSE[1:0]OutputCoprocessor handshake execute indication for the ETM.

ETMCLKEN

OutputETM clock enable.
ETMDA[31:0]OutputData address for the ETM.
ETMDABORTOutputData abort for the ETM.
ETMDBGACKOutputDebug state indication for the ETM.
ETMDMAS[1:0]OutputData memory access size indication for the ETM.
ETMDnMREQOutputData memory request for the ETM.
ETMDnRWOutputData read and write indication for the ETM.
ETMDSEQOutputSequential data access indication for the ETM.

ETMHIVECS

OutputException vectors configuration indication for the ETM.
ETMIA[31:0]OutputInstruction address for the ETM.
ETMID15TO11[15:11]OutputInstruction data field for the ETM.
ETMID31TO25[31:25]OutputInstruction data field for the ETM.
ETMIJBITOutputJazelle state indication for the ETM.
ETMInMREQOutputSequence pipeline follower. If LOW at the end the cycle, then the processor requires an ETM memory access during the following cycle.
ETMINSTREXECOutputInstruction execute indication for the ETM.
ETMINSTRVALIDOutputInstruction valid indication for the ETM.
ETMISEQOutputSequential instruction access for the ETM.
ETMITBITOutputThumb state indication for the ETM.
ETMLATECANCELOutputCoprocessor late cancel indication for the ETM.
ETMPASSOutputCoprocessor instruction execute indication for the ETM.
ETMPROCID[31:0]OutputProcess ID for the ETM.
ETMPROCIDWROutputProcess ID Write indication for the ETM.

ETMPWRDOWN

InputThis signal must be tied HIGH if an ETM is not present in the design.
ETMRDATA[31:0]OutputRead data for the ETM.
ETMRNGOUT[1:0]OutputWatchpoint register match indication for the ETM.
ETMWDATA[31:0]OutputWrite data for the ETM.
ETMZIFIRSTOutputIndicates the current ARM instruction is the first being traced for the current Jazelle instruction.
ETMZILASTOutputIndicates the current ARM instruction is the last being traced for the current Jazelle instruction.
TRACEPROCID[31:0]InputTrace Process ID. This signal comes from a CP15, is registered, and then exported as ETMPROCID[31:0].
TRACEPROCIDWRInputTrace Process ID Write. This signal is asserted when TRACEPROCID[31:0] is active.
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