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| Home > Introduction > ARM7EJ-S processor block, core, and interface diagrams |
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The ARM7EJ-S processor architecture, core, and interface diagrams are shown in the following figures:
the Figure 1.3 is shown in Figure 1.3
the Figure 1.4 is shown in Figure 1.4
the Figure 1.5 is shown in Figure 1.5.
Refer to Chapter 6 Debug Interface and EmbeddedICE-RT for a description of the EmbeddedICE-RT logic.
| Copyright © 2001 ARM Limited. All rights reserved. | ARM DDI 0214B |
| Non-Confidential | |
| PDF version | |
| Home > Introduction > ARM7EJ-S processor block, core, and interface diagrams |