9.7. MRS

An MRS operation always takes two cycles, as follows:

  1. The first cycle enables any pending state changes to the PSR to be made.

  2. The second cycle passes the PSR register through the ALU so that it can be written to the destination register.

Note

The MRS instruction can only be executed when in ARM state.

Table 9.8 shows the MRS cycle timings.

Table 9.8. Cycle timings for MRS

CycleADDRRDATATRANS
1pc+3i(pc+2i)I cycle
2pc+3i-S cycle
  (pc+3i) 
Copyright ©  2001 ARM Limited. All rights reserved.ARM DDI 0214B
Non-Confidential