9.19. Coprocessor data processing operation

A coprocessor data (CDP) operation is a request from the ARM7EJ-S processor for the coprocessor to initiate some action. The coprocessor does not have to complete the action immediately, but the coprocessor must commit to completion before driving CHSD or CHSE to LAST.

If the coprocessor cannot perform the requested task, it leaves CHSD at ABSENT.

When the coprocessor is able to perform the task, but cannot commit immediately, it drives CHSD to WAIT, and in subsequent cycles drives CHSE to WAIT until able to commit. When it is able to commit, it drives CHSE to LAST.

An interrupt can cause the ARM7EJ-S processor to abandon a busy-waiting coprocessor instruction (see Busy-waiting and interrupts).

Note

Coprocessor operations are only available in ARM state.

Table 9.26 shows the cycle timings for coprocessor data operations. In Table 9.26, LC represents the signal CPLATECANCEL.

Table 9.26. Cycle timings for coprocessor data operations

Cycle

ADDR

RDATA

TRANS

CPINSTR

CPPPASS

LC

CHSD

CHSE

Ready

   (pc)    
 1pc+3i(pc+2i)I cycle(pc+i)00

LAST

 
 2pc+3i-S cycle(pc+2i)10 -
   (pc+3i) (pc+2i)    

Not ready

   (pc)    
 1pc+3i(pc+2i)I cycle(pc+i)00

WAIT

 
  pc+3i-I cycle(pc+2i)10 

WAIT

 n+1pc+3i-I cycle(pc+2i)10 

LAST

 n+2pc+3i -S cycle(pc+2i)10 -
   (pc+3i) (pc+2i)    
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