ARM7EJ-S Technical Reference Manual(Rev 1)
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8.2. Reset modes

Two reset signals are present in the ARM7EJ-S processor design to enable you to reset different parts of the design independently. A description of the reset signaling combinations and possible applications is shown in Table 8.1.

Table 8.1. Reset modes

ModenRESETDBGnTRSTApplication
Full system resetLOWLOWReset at power up, full system reset.
Core resetLOWHIGHReset of processor core only.
EmbeddedICE-RT resetHIGHLOWReset of EmbeddedICE-RT circuitry.
NormalHIGHHIGHNo reset. Normal run mode.
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