9.2. Branch and ARM branch with link

Any ARM or Thumb branch, and an ARM branch with link operation takes three cycles as follows:

  1. During the first cycle, a branch instruction calculates the branch destination while performing a prefetch from the current PC. This prefetch is performed in all case, because by the time the decision to take the branch has been reached, it is already too late to prevent the prefetch. If the previous instruction requested a data memory access, the data is transferred in this cycle.

  2. During the second cycle, the ARM7EJ-S processor performs a fetch from the branch destination. If the link bit is set, the return address to be stored in r14 is calculated.

  3. During the third cycle, the ARM7EJ-S processor performs a fetch from the destination + i, refilling the instruction pipeline.

Table 9.3 shows the cycle timings for branches and ARM branch with link operations.

Table 9.3. Cycle timings for branch and ARM branch with link

CycleADDRRDATATRANS
1pc'(pc+2i)N cycle
2pc'+i(pc')S cycle
3pc'+2i(pc'+i)S cycle
  (pc'+2i) 
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