1.1. About the ARM7EJ-S processor with Jazelle technology

The ARM7EJ-S processor has the ARMv5TEJ architecture with Jazelle technology featuring an enhanced multiplier design for improved Digital Signal Processing (DSP) performance.The Jazelle technology enables direct execution of Java bytecodes on ARM processors, providing the performance for the next generation of Java-powered wireless and embedded devices.

The ARM7EJ-S processor is a member of the ARM family of general-purpose 32-bit microprocessors. The ARM family of processors offers high performance for very low power consumption and gate count.

The ARM architecture is based on Reduced Instruction Set Computer (RISC) principles. The reduced instruction set and related decode mechanism are much simpler than those of Complex Instruction Set Computer (CISC) designs. This simplicity gives:

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