5.2. Synchronizing the coprocessor pipeline

A coprocessor connected to the ARM7EJ-S processor determines which instructions it requires to execute by implementing a pipeline follower. The instruction arrives from the memory and enters the ARM7EJ-S processor pipeline. Because of the pipelined interface between the ARM7EJ-S processor and the coprocessor, the coprocessor pipeline follower operates one cycle behind the ARM7EJ-S processor, sampling the CPINSTR[31:0] output bus from the ARM7EJ-S coprocessor interface.

To hide the pipeline delay, a mechanism inside the ARM7EJ-S coprocessor interface block stalls the ARM7EJ-S processor for a cycle whenever an external coprocessor instruction is decoded. This enables the external coprocessor to resynchronize with the ARM7EJ-S processor.

After this initial stall cycle, the two pipelines can be considered synchronized. The ARM7EJ-S processor then informs the coprocessor when instructions move from Decode into Execute, and whether the instruction has passed its condition codes and is to be executed.

Copyright ©  2001 ARM Limited. All rights reserved.ARM DDI 0214B