6.1. About the debug interface

The ARM7EJ-S processor debug interface is based on IEEE Std. 1149.1-1990, Standard Test Access Port and Boundary-Scan Architecture. Refer to this standard for an explanation of the terms used in this chapter and for a description of the TAP controller states.

The ARM7EJ-S processor contains hardware extensions for advanced debugging features. These make it easier to develop application software, operating systems, and the hardware itself. The processor supports two modes of debug operation:

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