B.8.2. Interrupts

When the ARM7EJ-S processor enters debug state, interrupts are automatically disabled.

If an interrupt is pending during the instruction prior to entering debug state, the ARM7EJ-S processor enters debug state in the mode of the interrupt. On entry to debug state, the debugger cannot assume that the ARM7EJ-S processor is in the mode expected by your program. The ARM7EJ-S processor must check the PC, the CPSR, and the SPSR to determine accurately the reason for the exception.

Debug, therefore, takes higher priority than the interrupt, but the ARM7EJ-S processor does recognize that an interrupt has occurred.

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