B.9.2. Programming and reading EmbeddedICE-RT logic registers

An EmbeddedICE-RT logic register is programmed by shifting data into the EmbeddedICE scan chain (scan chain 2). The scan chain is a 38-bit register comprising:

This is shown in Figure B.6.

Figure B.6. EmbeddedICE macrocell overview

If a watchpoint is requested on a particular memory location but the data value is irrelevant, you can program the data mask register to 0xFFFF FFFF (all bits set), so that the entire data bus value is masked.

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