B.11.1. Breakpoint and watchpoint coupling example

Let:

Av[31:0]

Be the value in the address value register.

Am[31:0]

Be the value in the address mask register.

A[31:0]

Be the address bus from the ARM7EJ-S processor.

Dv[31:0]

Be the value in the data value register.

Dm[31:0]

Be the value in the data mask register.

D[31:0]

Be the data bus from the ARM7EJ-S processor.

Cv[8:0]

Be the value in the control value register.

Cm[7:0]

Be the value in the control mask register.

C[9:0]

Be the combined control bus from the ARM7EJ-S processor, other watchpoint registers, and the DBGEXT signal.

CHAINOUT signal

The CHAINOUT signal is derived as follows:

WHEN (({Av[31:0],Cv[4:0]} XNOR {A[31:0],C[4:0]}) OR {Am[31:0],Cm[4:0]} == 0xFFFFFFFFF)
CHAINOUT = ((({Dv[31:0],Cv[6:4]} XNOR {D[31:0],C[7:5]}) OR {Dm[31:0],Cm[7:5]}) == 0x7FFFFFFFF) 

The CHAINOUT output of watchpoint register 1 provides the CHAIN input to Watchpoint 0. This CHAIN input allows for quite complicated configurations of breakpoints and watchpoints.

Note

There is no CHAIN input to Watchpoint 1 and no CHAIN output from Watchpoint 0.

Take, for example, the request by a debugger to breakpoint on the instruction at location YYY when running process XXX in a multiprocess system. If the current process ID is stored in memory, you can implement the above function with a watchpoint and breakpoint chained together. The watchpoint address points to a known memory location containing the current process ID, the watchpoint data points to the required process ID and the ENABLE bit is set to off.

The address comparator output of the watchpoint is used to drive the write enable for the CHAINOUT latch. The input to the latch is the output of the data comparator from the same watchpoint. The output of the latch drives the CHAIN input of the breakpoint comparator. The address YYY is stored in the breakpoint register, and when the CHAIN input is asserted, the breakpoint address matches and the breakpoint triggers correctly.

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