2.7.2. The Thumb state register set

The Thumb state register set is a subset of the ARM state set. The programmer has direct access to:

There are banked SPs, LRs, and SPSRs for each privileged mode. This register set is shown in Figure 2.4.

Figure 2.4. Register organization in Thumb state

Copyright ©  2001 ARM Limited. All rights reserved.ARM DDI 0214B