6.8.4. Using the debug communications channel

You can send and receive messages using the DCC. These are described in:

Sending a message to the debugger

Before the processor can send a message to the debugger, it must check that the communications data write register is free for use by finding out if the W bit of the DCC control register is clear. The processor reads the DCC control register to check the status of the W bit:

  • If the W bit is clear, the communications data write register is clear.

  • If the W bit is set, previously written data has not been read by the debugger. The processor must continue to poll the control register until the W bit is clear.

When the W bit is clear, a message is written by a register transfer to coprocessor 14. As the data transfer occurs from the processor to the communications data write register, the W bit is set in the DCC control register.

The debugger has two options available for reading data from the communications data write register:

  • Poll the DCC control register before reading the communications data written. If the W bit is set, there is valid data present in the DCC data write register. The debugger can then read this data and scan the data out. The action of reading the data clears the DCC control register W bit. Then the communications process can begin again.

  • Poll the DCC data write register, obtaining data and valid status. The data scanned out consists of the contents of the communications data write register (which might or might not be valid), and a flag that indicates whether the data read is valid or not. The status flag is present in the Addr[0] bit position of scan chain 2 when the data is scanned out. See Test data registers for details of scan chain 2.

Receiving a message from the debugger

Transferring a message from the debugger to the processor is similar to sending a message to the debugger. In this case, the debugger polls the R bit of the DCC control register:

  • If the R bit is LOW, the DCC data read register is free, and data can be placed there for the processor to read.

  • If the R bit is set, previously deposited data has not yet been collected, so the debugger must wait.

When the DCC data read register is free, data is written there using the JTAG interface. The action of this write sets the R bit in the DCC control register.

The processor polls the DCC control register. If the R bit is set, there is data that can be read using an MRC instruction to coprocessor 14. The action of this load clears the R bit in the DCC control register. When the debugger polls this register and sees that the R bit is clear, the data has been taken, and the process can now be repeated.

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