The PrimeCell RTC test registers are memory-mapped as shown
in Table 4.1.
Table 4.1. Test registers memory map
| Address | Type | Width | Reset value | Name | Description |
|---|
RTC Base + 0x80 | Read/write | 3 | 0x00000000 | RTCITCR | Integration test control register |
RTC Base + 0x84 | Read/write | 0 | 0x00000000 | RTCITIP | Integration test input read or set register |
RTC Base + 0x88 | Read/write | 1 | 0x00000000 | RTCITOP | Integration test output read or set register |
RTC Base + 0x8C | Read/write | 32 | 0x00000000 | RTCTOFFSET | Test offset register |
RTC Base + 0x90 | Read/write | 32 | 0x00000000 | RTCTCOUNT | Test count register |
Note
Test registers must not be accessed during normal operation.
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