ARM PrimeCell™ Technical Reference Manual

Real Time Clock (PL031)


Table of Contents

Preface
About this document
Intended audience
Organization
Typographical conventions
Timing diagram conventions
Further reading
ARM publications
Feedback
Feedback on this document
Feedback on the ARM PrimeCell Real Time Clock (PL031)
1. Introduction
1.1. About the ARM PrimeCell Real Time Clock (PL031)
1.1.1. Features of the PrimeCell RTC
2. Functional Overview
2.1. ARM PrimeCell Real Time Clock (PL031) overview
2.2. PrimeCell RTC functional description
2.2.1. AMBA APB interface
2.2.2. Register block
2.2.3. Control block
2.2.4. Update block
2.2.5. Synchronization block
2.2.6. Counter block
2.2.7. Test register and logic
2.3. PrimeCell RTC operation
2.3.1. Interface reset
2.3.2. Clock signals
2.3.3. PrimeCell RTC operation
3. Programmer’s Model
3.1. About the programmer’s model
3.2. Summary of PrimeCell RTC registers
3.3. General registers
3.3.1. Data register, RTCDR
3.3.2. Match register, RTCMR
3.3.3. Load register, RTCLR
3.3.4. Control register, RTCCR
3.3.5. Interrupt mask set or clear register, RTCIMSC
3.3.6. Raw interrupt status, RTCRIS
3.3.7. Masked interrupt status, RTCMIS
3.3.8. Interrupt clear register, RTCICR
3.4. Peripheral identification registers, RTCPeriphID0-3
3.4.1. RTCPeriphID0 register
3.4.2. RTCPeriphID1 register
3.4.3. RTCPeriphID2 register
3.4.4. RTCPeriphID3 register
3.5. PrimeCell identification registers, RTCPCellID0-3
3.5.1. RTCPCellID0 register
3.5.2. RTCPCellID1 register
3.5.3. RTCPCellID2 register
3.5.4. RTCPCellID3 register
3.6. Interrupts
4. Programmer’s Model for Test
4.1. PrimeCell RTC test harness overview
4.2. Scan testing
4.3. Test registers
4.3.1. Integration test control register, RTCITCR
4.3.2. Integration test input read or set register, RTCITIP
4.3.3. Integration test output read or set register, RTCITOP
4.3.4. Test offset register, RTCTOFFSET
4.3.5. Test count register, RTCTCOUNT
4.4. Integration testing of block inputs
4.5. Integration testing of block outputs
4.5.1. Intra-chip outputs
4.6. Integration test summary
A. ARM PrimeCell Real Time Clock (PL031) Signal Descriptions
A.1. AMBA APB signals
A.2. On-chip signals

Proprietary Notice

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The product described in this document is subject to continuous developments and improvements. All particulars of the product and its use contained in this document are given by ARM in good faith. However, all warranties implied or expressed, including but not limited to implied warranties of merchantability, or fitness for purpose, are excluded.

This document is intended only to assist the reader in the use of the product. ARM Limited shall not be liable for any loss or damage arising from the use of any information in this document, or any error or omission in such information, or any incorrect use of the product.

Confidentiality Status

This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in accordance with the terms of the agreement entered into by ARM and the party that ARM delivered this document to.

Product Status

The information in this document is final, that is for a developed product.

Revision History
Revision AAugust 2001First release
Revision BOctober 2001Signal name nRtcRST changed to nRTCRST. Additional interface reset information added.
Copyright ©  2001 ARM Limited. All rights reserved.. All rights reserved.ARM DDI 0224B
Non-Confidential