4.6. Integration test summary

Table 4.6 summarizes the integration test strategy for all RTC signals.

Table 4.6. RTC integration test strategy

NameTypeSource/destinationTest strategy
PRESETn

Input

Reset controller

Not tested using integration test vectors

PADDR

Input

APB

Register read/write

PCLK

Input

APB

Register read/write

PENABLE

Input

APB

Register read/write

PRDATA

Output

APB

Register read/write

PSEL

Input

APB

Register read/write

PWDATA

Input

APB

Register read/write

PWRITE

Input

APB

Register read/write

CLK1HZ

Input

Clock generator

Not tested using integration test vectors

nRTCRST

Input

Reset controller

Not tested using integration test vectors

nPOR

Input

Reset controller

Not tested using integration test vectors

RTCINTR

Output

Interrupt controller

Tested using RTCITOP register

SCANENABLE

Input

Test controller

Not tested using integration test vectors

SCANINPCLK

Input

Test controller

Not tested using integration test vectors

SCANINCLK1HZ

Input

Test controller

Not tested using integration test vectors

SCANOUTPCLK

Output

Test controller

Not tested using integration test vectors

SCANOUTCLK1HZ

Output

Test controller

Not tested using integration test vectors


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