2.2.5. Synchronization block

The RTC contains a synchronization block because PCLK and CLK1HZ can be asynchronous. The synchronization logic prevents the propagation of metastable values when there is transfer of data or control signals from one clock domain to another.

CLK1HZ to PCLK

The signals to be synchronized are:

Counter value

This value in the Update block is used to calculate updates to the value of the RTC and to calculate the equivalent match value.

Raw and masked interrupts

These interrupts are synchronized to the PCLK domain registers:

RTCRIS

Raw Interrupt Status register.

RTCMIS

Masked Interrupt Status register.

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