3.3.5. Interrupt Mask Set or Clear register, RTCIMSC

RTCIMSC is a 1-bit read/write register, and controls the masking of the interrupt that the RTC generates. Writing to bit[0] sets or clears the mask. Reading this register returns the current value of the mask on the RTCINTR interrupt. Table 3.6 shows the bit assignments for the RTIMSC register.

Table 3.6. RTCIMSC register

Bits

Name

Type

Function

[31:1]

-

-

Reserved. Read as zero. Must be written as 0.

[0]

RTCIMSC

RW

Writing 1 sets the mask.

Writing 0 clears the mask.


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