3.3.7. Masked Interrupt Status, RTCMIS

RTCMIS is a 1-bit masked interrupt status register. It is a read-only register. Reading this register gives the current masked status value of the corresponding interrupt. A write has no effect. Table 3.8 shows the bit assignments for the RTCMIS register.

Table 3.8. RTCMIS register

BitsNameTypeFunction
[31:1]--

Reserved. Read as zero.

[0]RTCMISROGives the masked interrupt status (after masking) of the RTCINTR interrupt.

Copyright © 2001, 2017 ARM Limited or its affiliates. All rights reserved.ARM DDI 0224C
Non-ConfidentialID052317