ARM® PrimeCell Real Time Clock (PL031) Technical Reference Manual

Revision: r1p3


Table of Contents

Preface
About this book
Product revision status
Intended audience
Using this book
Glossary
Conventions
Additional reading
Feedback
Feedback on this product
Feedback on content
1. Introduction
1.1. About the Real Time Clock
1.1.1. Features of the RTC
2. Functional overview
2.1. Real Time Clock overview
2.2. RTC functional description
2.2.1. AMBA APB interface
2.2.2. Register block
2.2.3. Control block
2.2.4. Update block
2.2.5. Synchronization block
2.2.6. Counter block
2.2.7. Test register and logic
2.3. RTC operation
2.3.1. Interface reset
2.3.2. Clock signals
2.3.3. RTC operation
3. Programmers model
3.1. About the programmers model
3.2. Summary of RTC registers
3.3. General registers
3.3.1. Data Register, RTCDR
3.3.2. Match Register, RTCMR
3.3.3. Load Register, RTCLR
3.3.4. Control Register, RTCCR
3.3.5. Interrupt Mask Set or Clear register, RTCIMSC
3.3.6. Raw Interrupt Status, RTCRIS
3.3.7. Masked Interrupt Status, RTCMIS
3.3.8. Interrupt Clear Register, RTCICR
3.4. Peripheral identification registers, RTCPeriphID0-3
3.4.1. RTCPeriphID0 register
3.4.2. RTCPeriphID1 register
3.4.3. RTCPeriphID2 register
3.4.4. RTCPeriphID3 register
3.5. PrimeCell identification registers, RTCPCellID0-3
3.5.1. RTCPCellID0 register
3.5.2. RTCPCellID1 register
3.5.3. RTCPCellID2 register
3.5.4. RTCPCellID3 register
3.6. Interrupts
4. Programmers model for test
4.1. RTC test harness overview
4.2. Scan testing
4.3. Test registers
4.3.1. Integration Test Control Register, RTCITCR
4.3.2. Integration Test Input register, RTCITIP
4.3.3. Integration Test Output register, RTCITOP
4.3.4. Test Offset register, RTCTOFFSET
4.3.5. Test Count register, RTCTCOUNT
4.4. Integration testing of block inputs
4.5. Integration testing of block outputs
4.5.1. Intra-chip outputs
4.6. Integration test summary
A. Signal descriptions
A.1. AMBA APB signals
A.2. On-chip signals
B. Revisions

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Product Status

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Revision History
Revision AAugust 2001First release for 1.0.
Revision BOctober 2001Second release for 1.0
Revision C23 May 2017First release for r1p3
Copyright © 2001, 2017 ARM Limited or its affiliates. All rights reserved.ARM DDI 0224C
Non-ConfidentialID052317