3.3.4. A7WrapMaster

In master mode, this block converts the pseudo-AHB accesses from A7WrapSM into true AHB by adding support for split and retry responses, and also for HGRANT. A SPLIT or RETRY response, or loss of HGRANT, causes the affected access to be placed into a holding register for reconstruction when the access can recommence on the AHB. During this time, the pseudo-AHB access is simply waited using MREADY.

The holding registers store the current transfer on the pseudo-AHB on each valid cycle (qualified by MREADY). The AHB outputs are multiplexed based on the signal HoldSel. This is a registered signal, which is synchronously set and cleared by HoldSet and HoldClr respectively:

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