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The AHB to APB bridge is an AHB slave, providing an interface between the high- speed AHB and the low-power APB. Read and write transfers on the AHB are converted into equivalent transfers on the APB. Because the APB is not pipelined, wait states are added during transfers to and from the APB when the AHB is required to wait for the APB. Figure 4.1 shows the block diagram of the APB bridge module.
The main sections of this module are:
AHB slave bus interface
APB transfer state machine, which is independent of the device memory map
APB output signal generation.
To add new APB peripherals, or alter the system memory map, only the address decode sections have to be modified.