5.2.3. Register memory map

The base address of the remap and pause controller memory is not fixed and can be different for any particular system implementation. However, the offset of any particular register from the base address is fixed. Table 5.5 shows the remap and pause controller memory map.

Table 5.5. Memory map of the remap and pause controller APB peripheral

Address

Read location

Write location

RemapBase + 0x00

-

Pause

RemapBase + 0x10

Identification

-

RemapBase + 0x20

-

ClearResetMap

RemapBase + 0x30

ResetStatus

ResetStatusSet

RemapBase + 0x34

-

ResetStatusClear

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