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On completion, the exception handler:
Moves the LR, minus an offset where appropriate, to the PC. The offset varies depending on the type of exception.
Copies the SPSR back to the CPSR.
Clears the interrupt disable flags, if they were set on entry.
An explicit switch back to Thumb state is never necessary, because restoring the CPSR from the SPSR automatically sets the T bit to the value it held immediately prior to the exception.