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The EmbeddedICE-RT logic provides integrated on-chip debug support for the ARM720T core. It enables you to program the conditions under which a breakpoint or watchpoint can occur.
The EmbeddedICE-RT logic is an enhanced implementation of EmbeddedICE, and enables you to perform debugging in monitor mode. In monitor mode, the core takes an exception on a breakpoint or watchpoint, rather than entering debug state as it does in halt mode.
If the core does not enter debug state when it encounters a watchpoint or breakpoint, it can continue to service hardware interrupt requests as normal. Debugging in monitor mode is useful if the core forms part of the feedback loop of a mechanical system, where stopping the core can potentially lead to system failure.
The EmbeddedICE-RT logic contains a Debug Communications Channel (DCC). The DCC is used to pass information between the target and the host debugger. The EmbeddedICE-RT logic is controlled through the Joint Test Action Group (JTAG) test access port.
To provide support for the EmbeddedICE-RT macrocell, the following changes have been made to the programmer’s model for the ARM720T processor:
There are two new bits in the Debug Control Register:
Monitor mode enable. Use this to control how the device reacts on a breakpoint or watchpoint:
When set, the core takes the instruction or data abort exception.
When clear, the core enters debug state.
EmbeddedICE-RT disable. Use this when changing watchpoints and breakpoints:
When set, this bit disables breakpoints and watchpoints, enabling the breakpoint or watchpoint registers to be programmed with new values.
When clear, the new breakpoint or watchpoint values become operational.
For more information, see Debug control register.
A new register, r2, in the coprocessor CP14 register map indicates if the processor entered the Prefetch or Data Abort exception because of a real abort, or because of a breakpoint or watchpoint. For more details, see Abort status register.
For more details, see Chapter 9 Debugging Your System.
| Copyright © 2001, 2003, 2004 ARM Limited. All rights reserved. | ARM DDI 0229C |
| PDF version | |
| Home > Introduction > About the ARM720T processor > EmbeddedICE-RT logic |