| Copyright © 2001, 2003, 2004 ARM Limited. All rights reserved. | ARM DDI 0229C |
| Non-Confidential | |
 PDF version | |
| Home > Debugging Your System > Programming breakpoints > Hardware breakpoints |
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To make a watchpoint unit cause hardware breakpoints (on instruction fetches):
Program its address value register with the address of the instruction to be breakpointed.
Program the breakpoint bits for each state as follows:
Set bits [1:0] of the address mask register.
Set bit 0 of the address mask register.
In either case, clear the remaining bits.
Program the data value register only when you require
a data-dependent breakpoint, that is only when you have to match
the actual instruction code fetched as well as the address. If the
data value is not required, program the data mask register to 0xFFFFFFFF (all
bits set). Otherwise program it to 0x00000000.
Program the control value register with PROT[0] = 0.
Program the control mask register with PROT[0]= 0, all other bits set.
When you have to make the distinction between User and non-User mode instruction fetches, program the PROT[1] value and mask bits appropriately.
If required, program the DBGEXT, RANGE, and CHAIN bits in the same way.
Set the mask bits for all unused control values.
In monitor mode, you must set the EmbeddedICE-RT disable bit (bit 5 in the Debug Control Register) before changing the register values, and clear it on completion of the programming.
| Copyright © 2001, 2003, 2004 ARM Limited. All rights reserved. | ARM DDI 0229C |
| Non-Confidential | |
| PDF version | |
| Home > Debugging Your System > Programming breakpoints > Hardware breakpoints |