| Copyright © 2001, 2003, 2004 ARM Limited. All rights reserved. | ARM DDI 0229C |
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The cache only operates on a write-through basis with a read-miss allocation policy and a random replacement algorithm.
| Copyright © 2001, 2003, 2004 ARM Limited. All rights reserved. | ARM DDI 0229C |
| PDF version | |
| Home > Instruction and Data Cache > About the instruction and data cache |