You control the operation of the write buffer with CP15 register 1, the Control Register (see Control Register).

When the CPU performs a write operation, the translation entry for that address is inspected and the state of the B bit determines the subsequent action. If the write buffer is disabled using the Control Register, buffered writes are treated in the same way as unbuffered writes.

To enable the write buffer:

To disable the write buffer, clear bit 3 in the Control Register. Any writes already in the write buffer complete normally. The write buffer attempts a write operation as long as there is data present.