| Copyright © 2001, 2003, 2004 ARM Limited. All rights reserved. | ARM DDI 0229C |
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| Home > Instruction and Data Cache > About the instruction and data cache > Read-lock-write |
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| Home > Instruction and Data Cache > About the instruction and data cache > Read-lock-write | |||
The IDC treats the read-lock-write instruction as a special case:
Always forces a read of external memory, regardless of whether the data is contained in the cache.
Is treated as a normal write operation. If the data is already in the cache, the cache is updated.
Externally, the two phases are flagged as indivisible by asserting the HLOCK signal.
| Copyright © 2001, 2003, 2004 ARM Limited. All rights reserved. | ARM DDI 0229C |
| PDF version | |
| Home > Instruction and Data Cache > About the instruction and data cache > Read-lock-write |