| Copyright © 2001, 2003, 2004 ARM Limited. All rights reserved. | ARM DDI 0229C |
| Non-Confidential | |
 PDF version | |
| Home > Instruction and Data Cache > IDC validity > Software IDC flush |
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The entire IDC can be marked as invalid by writing to the Cache Operations Register c7. The cache is flushed immediately the register is written, but the following two instruction fetches can come from the cache before the register is written.
| Copyright © 2001, 2003, 2004 ARM Limited. All rights reserved. | ARM DDI 0229C |
| Non-Confidential | |
| PDF version | |
| Home > Instruction and Data Cache > IDC validity > Software IDC flush |