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There are three JTAG-style scan chains within the ARM720T processor. These enable debugging and EmbeddedICE-RT programming.
A JTAG-style Test Access Port (TAP) controller controls the scan chains. For more details of the JTAG specification, see IEEE Standard 1149.1 - 1990 Standard Test Access Port and Boundary-Scan Architecture.
| Copyright © 2001, 2003, 2004 ARM Limited. All rights reserved. | ARM DDI 0229C |
| Non-Confidential | |
| PDF version | |
| Home > Debugging Your System > Scan chains and the JTAG interface |