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| Home > Programmer’s Model for Test > Test registers > Test Input 0 Register, MPMCITIP0 |
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The MPMCITIP0 Register is a 32-bit register. This register must only be used in test mode.
The register can be accessed with one wait state.
Table 4.3 lists the bit assignments for the MPMCITIP0 Register.
Table 4.3. MPMCITIP0 Register bit assignments
| Bits | Name | Description |
|---|---|---|
| [31] | MPMCDYDDRPOL | DDR-SDRAM pad interface polarity signal MPMCDYDDRPOL. Read: Read the value of this field if the MPMCITCR T bit is HIGH. Read the value of the MPMCDYDDRPOL input signal if the MPMCITCR T bit is LOW. Write: 0 = Clear this field if the MPMCITCR T bit is HIGH. 1 = Set this field if the MPMCITCR T bit is HIGH. |
| [30:29] | MPMCDYDDRDLY | DDR-SDRAM pad interface configuration signal MPMCDYDDRDLY[1:0]. Read: Read the value of this field if the MPMCITCR T bit is HIGH. Read the value of the MPMCDYDDRDLY[1:0] input signal if the MPMCITCR T bit is LOW. Write: 0 = Clear this field if the MPMCITCR T bit is HIGH. 1 = Set this field if the MPMCITCR T bit is HIGH. |
| [28] | MPMCBOOTDLY | Boot delay signal MPMCBOOTDLY. Read: Read the value of this field if the MPMCITCR T bit is HIGH. Read the value of the MPMCBOOTDLY input signal if the MPMCITCR T bit is LOW. Write: 0 = Clear this field if the MPMCITCR T bit is HIGH 1 = Set this field if the MPMCITCR T bit is HIGH. |
| [27] | MPMCDYSDRPOL | SDR-SDRAM pad interface polarity signal MPMCDYSDRPOL. Read: Read the value of this field if the MPMCITCR T bit is HIGH. Read the value of the MPMCDYSDRPOL input signal if the MPMCITCR T bit is LOW. Write: 0 = Clear this field if the MPMCITCR T bit is HIGH 1 = Set this field if the MPMCITCR T bit is HIGH. |
| [26:25] | MPMCDYSDRDLY | SDR-SDRAM pad interface configuration signal MPMCDYSDRDLY[1:0]. Read: Read the value of this field if the MPMCITCR T bit is HIGH. Read the value of the MPMCDYSDRDLY[1:0] input signal if the MPMCITCR T bit is LOW. Write: 0 = Clear this field if the MPMCITCR T bit is HIGH 1 = Set this field if the MPMCITCR T bit is HIGH. |
| [24:21] | MPMCDYCS5CASDLY | Chip select5 CAS delay signal MPMCDYCS5CASDLY[3:0]. Read: Read the value of this field if the MPMCITCR T bit is HIGH. Read the value of the MPMCDYCS5CASDLY[3:0] input signal if the MPMCITCR T bit is LOW. Write: 0 = Clear this field if the MPMCITCR T bit is HIGH 1 = Set this field if the MPMCITCR T bit is HIGH. |
| [20:13] | MPMCDYCS5ADRMAP | Chip select5 address map signal MPMCDYCS5ADRMAP[7:0]. Read: Read the value of this field if the MPMCITCR T bit is HIGH. Read the value of the MPMCDYCS5ADRMAP[7:0] input signal if the MPMCITCR T bit is LOW. Write: 0 = Clear this field if the MPMCITCR T bit is HIGH 1 = Set this field if the MPMCITCR T bit is HIGH. |
| [12:10] | MPMCDYCS5DEVICE | Chip select5 device signal MPMCDYCS5DEVICE[2:0]. Read: Read the value of this field if the MPMCITCR T bit is HIGH. Read the value of the MPMCDYCS5DEVICE[2:0] input signal if the MPMCITCR T bit is LOW. Write: 0 = Clear this field if the MPMCITCR T bit is HIGH 1 = Set this field if the MPMCITCR T bit is HIGH. |
| [9] | MPMCDLLCALIACK | Value of DLL calibration acknowledge signal MPMCDLLCALIACK. Read: Read the value of this field if the MPMCITCR T bit is HIGH. Read the value of the MPMCDLLCALIACK input signal if the MPMCITCR T bit is LOW. Write: 0 = Clear this field if the MPMCITCR T bit is HIGH 1 = Set this field if the MPMCITCR T bit is HIGH. |
| [8] | MPMCSTCS1PB | Polarity of byte lane for chip select1 signal MPMCSTCS1PB. Read: Read the value of this field if the MPMCITCR T bit is HIGH. Read the value of the MPMCSTCS1PB input signal if the MPMCITCR T bit is LOW. Write: 0 = Clear this field if the MPMCITCR T bit is HIGH 1 = Set this field if the MPMCITCR T bit is HIGH. |
| [7] | MPMCSTCS3POL | Polarity of chip select3 signal MPMCSTCS3POL. Read: Read the value of this field if the MPMCITCR T bit is HIGH. Read the value of the MPMCSTCS3POL input signal if the MPMCITCR T bit is LOW. Write: 0 = Clear this field if the MPMCITCR T bit is HIGH 1 = Set this field if the MPMCITCR T bit is HIGH. |
| [6] | MPMCSTCS2POL | Polarity of chip select2 signal MPMCSTCS2POL. Read: Read the value of this field if the MPMCITCR T bit is HIGH. Read the value of the MPMCSTCS2POL input signal if the MPMCITCR T bit is LOW. Write: 0 = Clear this field if the MPMCITCR T bit is HIGH 1 = Set this field if the MPMCITCR T bit is HIGH. |
| [5] | MPMCSTCS1POL | Polarity of chip select1 signal MPMCSTCS1POL. Read: Read the value of this field if the MPMCITCR T bit is HIGH. Read the value of the MPMCSTCS1POL input signal if the MPMCITCR T bit is LOW. Write: 0 = Clear this field if the MPMCITCR T bit is HIGH 1 = Set this field if the MPMCITCR T bit is HIGH. |
| [4] | MPMCSTCS0POL | Polarity of chip select0 signal MPMCSTCS0POL. Read: Read the value of this field if the MPMCITCR T bit is HIGH. Read the value of the MPMCSTCS0POL input signal if the MPMCITCR T bit is LOW. Write: 0 = Clear this field if the MPMCITCR T bit is HIGH 1 = Set this field if the MPMCITCR T bit is HIGH. |
| [3:2] | MPMCSTCS1MW | Chip select 1 memory width MPMCSTCS1MW[1:0]. Read: Read the value of this field if the MPMCITCR T bit is HIGH. Read the value of the MPMCSTCS1MW[1:0] input signal if the MPMCITCR T bit is LOW. Write: 0 = Clear this field if the MPMCITCR T bit is HIGH 1 = Set this field if the MPMCITCR T bit is HIGH. |
| [1] | MPMCBIGENDIAN | Big-endian enable signal MPMCBIGENDIAN. Read: Read the value of this field if the MPMCITCR T bit is HIGH. Read the value of the MPMCBIGENDIAN input signal if the MPMCITCR T bit is LOW. Write: 0 = Clear this field if the MPMCITCR T bit is HIGH 1 = Set this field if the MPMCITCR T bit is HIGH. |
| [0] | MPMCSREFREQ (SR) | Read: Read the value of this field if the MPMCITCR T bit is HIGH. Read the value of the MPMCSREFREQ input signal if the MPMCITCR T bit is LOW. Write: 0 = Clear this field if the MPMCITCR T bit is HIGH 1 = Set this field if the MPMCITCR T bit is HIGH. |
| Copyright © 2002-2003, 2005 ARM Limited. All rights reserved. | ARM DDI 0230D |
| Non-Confidential | |
| PDF version | |
| Home > Programmer’s Model for Test > Test registers > Test Input 0 Register, MPMCITIP0 |