| Copyright © 2002-2003 ARM Limited. All rights reserved. | ARM DDI 0233B |
| Non-Confidential | |
 PDF version | |
| Home > Implementation-defined Behavior > Values of ETM11RV read-only registers > ETM11RV Configuration Code Register |
| |||
| Home > Implementation-defined Behavior > Values of ETM11RV read-only registers > ETM11RV Configuration Code Register | |||
Table 3.2 shows
the value of the fields when reading the ETM11RV Configuration Code
Register. The configuration code register has the value 0x85294024.
Table 3.2. ETM11RV Configuration Code Register
| Bit numbers | Value | Meaning |
|---|---|---|
| [31] | 1 | ETM11RV ID Register present |
| [30:28] | b000 | Not used |
| [27] | 1 | Software access is supported |
| [26] | 1 | Trace start/stop block is present |
| [25:24] | 1 | Number of Context ID comparators |
| [23] | 1 | FIFOFULL logic present |
| [22:20] | 2 | Number of external outputs |
| [19:17] | 4 | Number of external inputs |
| [16] | 1 | The sequencer is present |
| [15:13] | 2 | Number of counters |
| [12:8] | 0 | Number of memory map decoders |
| [7:4] | 2 | Number of data comparators |
| [3:0] | 4 | Number of pairs of address comparators |
| Copyright © 2002-2003 ARM Limited. All rights reserved. | ARM DDI 0233B |
| Non-Confidential | |
| PDF version | |
| Home > Implementation-defined Behavior > Values of ETM11RV read-only registers > ETM11RV Configuration Code Register |