3.4. Parallel instruction execution

ARM11 cores support branch folding, where correctly predicted branches are executed in parallel with the following instruction. The ETM11RV is therefore capable of tracing two instructions per cycle, although only the second can have data associated with it.

While the trace start/stop block is calculated for each instruction as required, the ETM11RV is not capable of tracing one instruction without the other. In particular, if a folded branch is traced, the instruction it is paired with is also traced, along with any data associated with it if ViewData is active.

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