5.1.1. A typical debug system

The ARM7TDMI-S processor forms one component of a debug system that interfaces from the high-level debugging that you perform to the low-level interface supported by the ARM7TDMI-S processor. Figure 5.1 shows a typical debug system.

Figure 5.1. Typical debug system

A debug system usually has three parts:

Debug host

A computer that is running a software debugger such as the ARM Debugger for Windows (ADW). The debug host enables you to issue high-level commands such as setting breakpoints or examining the contents of memory.

Protocol converter

This interfaces between the high-level commands issued by the debug host and the low-level commands of the ARM7TDMI-S processor JTAG interface. Typically it interfaces to the host through an interface such as an enhanced parallel port.

Debug target

The ARM7TDMI-S processor has hardware extensions that ease debugging at the lowest level. These extensions enable you to:

  • halt program execution

  • examine and modify the internal state of the core

  • examine the state of the memory system

  • execute abort exceptions, allowing real-time monitoring of the core

  • resume program execution.

The debug host and the protocol converter are system-dependent.

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