ARM7TDMI-S Technical Reference ManualRevision: r4p3
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7.4. Thumb branch with link

A Thumb Branch with Link (BL) operation comprises two consecutive Thumb instructions and takes four cycles:

  1. The first instruction acts as a simple data operation. It takes a single cycle to add the PC to the upper part of the offset and stores the result in r14 (LR).

  2. The second instruction acts similar to the ARM BL instruction over three cycles:

    • During the first cycle, the ARM7TDMI-S core calculates the final branch destination while performing a prefetch from the current PC.

    • During the second cycle, the ARM7TDMI-S core performs a Fetch from the branch destination. The return address is stored in r14.

    • During the third cycle, the ARM7TDMI-S core performs a Fetch from the destination +2, refills the instruction pipeline, and modifies r14 (subtracting 2) to simplify the return to MOV PC, R14. This modification ensures that subroutines of the type PUSH {..,LR} ; POP {..,PC} work correctly.

Table 7.4 shows the cycle timings of the complete operation.

Table 7.4. Thumb long branch with link 

Cycle

Address

Size

Write

Data

TRANS[1:0]

Prot0

1

pc + 4

h

0

(pc + 4)

S cycle

0

2

pc + 6

h

0

(pc + 6)

N cycle

0

3

pc’

h

0

(pc’)

S cycle

0

4

pc’ + 2

h

0

(pc’ + 2)

S cycle

0

pc’ + 4

-

-

-

-

-

Note

PC is the address of the first instruction of the operation.

Thumb BL operations are explained in detail in the ARM Architecture Reference Manual.

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