5.10. The debug communications channel

The ARM7TDMI-S (Rev 4) EmbeddedICE-RT contains a Debug Communication Channel (DCC) for passing information between the target and the host debugger. This is implemented as coprocessor 14.

The DCC comprises two registers, as follows:

DCC control register

A 32-bit register, used for synchronized handshaking between the processor and the asynchronous debugger. For more details, see DCC control register.

DCC data register

A 32-bit register, used for data transfers between the debugger and the processor. For more details, see Communications through the DCC.

These registers occupy fixed locations in the EmbeddedICE-RT memory map, as shown in Table 5.1. They are accessed from the processor using MCR and MRC instructions to coprocessor 14.

The registers are accessed as follows:

By the debugger

Through scan chain 2 in the usual way.

By the processor

Through coprocessor register transfer instructions.

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