PrimeCell™ Synchronous Static Memory Controller (PL093) Technical Reference Manual 4.2.3. SSMC Test Input Register

This read/write register controls and reads the inputs of the SSMC. Figure 4.3 shows the bit assignments of the SSMCITIP Register.

Figure 4.3. SSMCITIP Register bit assignments

Table 4.3 lists the bit assignments of the SSMCITIP Register.

Table 4.3. SSMCITIP Register bit assignments

Bits	Name	Description
[31:7]	-	Read undefined. Write as zero.
[6]	SMBUSBACKOFFEBI	Read returns current value of signal. Write sets signal to value written.
[5]	SMTICBUSGNTEBI	Read returns current value of signal. Write sets signal to value written.
[4]	SMBUSGNTEBI	Read returns current value of signal. Write sets signal to value written.
[3]	SMEXTBUSMUX	Read returns current value of signal. Write sets signal to value written.
[2:1]	SMMEMCLKRATIO	Read returns current value of signal. Write sets signal to value written.
[0]	SMBIGENDIAN	Read returns current value of signal. Write sets signal to value written.

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