VFP9-S Vector Floating-point Coprocessor Technical Reference Manual: 5.12.7. FCVTDS/FCVTSD

5.12.7. FCVTDS/FCVTSD

Only the FCVTSD operation is capable of overflow or underflow. To reduce logic complexity, the overflow ranges are the same as the LSA ranges. Table 5.11 lists the FCVTSD bounce conditions.

Table 5.11. FCVTSD bounce thresholds

Exponent value	Float value	FCVTSD condition in Full-compliance mode
>`0x47F`	S-P^[a] overflow	Bounce
`0x47F`	S-P NaN or infinity	Bounce
`0x47E`	S-P maximum normal	Bounce
`0x47D`	S-P normal	Bounce
`0x47C`	S-P normal	Normal
`0x3FF`	e = 0 bias value	Normal
`0x381`	S-P normal	Normal
`0x380`	S-P subnormal	Bounce
<`0x380`	S-P underflow	Bounce
^[a]S-P = single-precision.

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