2.2.2. APB components

This section summarizes the APB components. For more details see Chapter 4 APB Components.


  • two 32-bit counters with an optional prescaler up to 8 bits

  • three modes of operation:

    • free running

    • periodic interrupt

    • one shot.


  • generates a regular, programmed interrupt

  • asserts WDOGRES reset signal if device remains unserviced.

Remap/pause controller

  • basic glue logic functions that are required to implement correct boot up behavior and a basic low-power mode of operation.

Example APB slave

  • a reference framework for a typical APB slave design

  • simple four-word register bank plus read-only registers providing arithmetic combinations of the writable registers.

PrimeCell General Purpose Input/Output (GPIO) (PL061)

  • sixteen individually-programmable input/output pins, eight input, eight output, with enables for usage as eight input/output pins when combined with external tristate drivers

  • control word read-back capability

  • additional test registers and modes implemented for functional verification and manufacturing test.

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