5.5. AHB file reader master

The AHB File Reader Master (FRM), FileRdMaster32 and FileRdMaster64, enables designers to simulate AHB systems quickly and efficiently by using it to generate explicit bus transfers. The FRM can operate in the ADK system with or without an ARM core present.

The FRM is a generic AHB Bus Functional Model (BFM) that directly controls bus activity by interpreting a stimulus file. The FRM facilitates the efficient validation of blocks or systems.

The 64-bit FRM, FileRdMaster64, is split into two parts:

The 32-bit FRM, FileRdMaster32, has an additional part, the funnel, that converts 32-bit transfers on a 64-bit bus to 32-bit transfers on a 32-bit bus.

The AHB-Lite file reader can:

The AHB-Lite file reader is controlled entirely through the stimulus file at simulation run time. It does not have a slave interface, and therefore cannot be addressed by another AHB master.

The human-readable input stimulus file must be transformed to a data file in Verilog hexadecimal format by the preprocessor script fm2conv.pl.

The FRM is designed so that, wherever possible, RTL code is used to describe its logic. All RTL code is written for synthesis with pragmas where necessary to enable the block to pass through synthesis tools.

Figure 5.5 shows a block diagram of the two versions of the FRM.

Figure 5.5. File reader bus master

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