3.5. Slave-to-master multiplexor

The slave-to-master multiplexor, MuxS2M, connects the read data and response signals of the system bus slaves to the bus masters. It uses the current decoder HSELx outputs to select the bus slave outputs to use. The default configuration is for seven slaves. Figure 3.5 shows the slave-to-master module block diagram.

Figure 3.5. Slave-to-master multiplexor module components

Copyright © 2003, 2007 ARM Limited. All rights reserved.ARM DDI 0243C
Non-Confidential