3.7.2. Test interface controller

The Test Interface Controller (TIC) is used during testing to read external test vectors and apply them to the system through the AMBA AHB master interface. The TIC is a state machine that provides an AMBA AHB bus master for system test. It reads test write and address data from the external data bus SMDATA, and drives the external bus with test read data, enabling the use of only one set of output tristate buffers onto SMDATA.

The TIC converts externally applied test vectors into internal transfers on the AHB bus. It uses a three-wire external handshake protocol, with two inputs controlling the type of vector that is applied and a single output that indicates when the next vector can be applied.

Typically, the TIC is the highest priority AMBA bus master, and ensures test access under all conditions.

The TIC model supports address incrementing and control vectors. This means that the TIC can automatically generate the address for burst transfers.

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